LPC54102J512BD64
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Cores
Cortex-M0+, 150 MHz
Cortex-M4, 150 MHz
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Family
LPC54102
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CMSIS Pack
LPC54102_DFP
The LPC5410x are ARM Cortex-M4 based microcontrollers for embedded applications. These devices include an ARM Cortex-M0+ coprocessor, up to 104 KB of on-chip SRAM, up to 512 KB on-chip flash, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), 3 USART, 2 SPI, and 3 I2C interface, and one 12-bit 5.0 Msamples/sec ADC. The ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core. The ARM Cortex-M0+ coprocessor is an energy-efficient and easy-to-use 32-bit core which is code and tool-compatible with the Cortex-M4 core. The Cortex-M0+ coprocessor offers up to 100 MHz performance with a simple instruction set and reduced code size.
Core |
Processor Cortex-M0+ |
Processor Cortex-M4 |
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Maximum Clock Frequency | 150 MHz | 150 MHz |
Memory Protection Unit | NO_MPU | MPU |
Floating Point Unit | NO_FPU | SP_FPU |
Trust Zone | ||
Digital Signal Processor | ||
CortexM Vector Extensions | ||
Endian | Little-endian | Little-endian |