CY8C6347FMI-BLD53
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Cores
Cortex-M0+, 100 MHz
Cortex-M4, 150 MHz
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Family
PSoC 63
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Sub-Family
CY8C63x7 Dual
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CMSIS Pack
CAT1A_DFP
PSoC 63 (Connectivity Line): Dual-core Cortex-M4/M0+ MCU series with programmable digital and analog peripherals, advanced graphics, CapSense, crypto and secure boot security, with integrated high-speed wired and wireless connectivity.
| Core |
Processor Cortex-M0+ |
Processor Cortex-M4 |
|---|---|---|
| Maximum Clock Frequency | 100 MHz | 150 MHz |
| Memory Protection Unit | MPU | MPU |
| Floating Point Unit | NO_FPU | SP_FPU |
| Trust Zone | ||
| Digital Signal Processor | ||
| CortexM Vector Extensions | ||
| Endian | Little-endian | Little-endian |