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  1. Devices
  2. M0 Series
  3. CMS32 Series
  4. CMS32F035

CMS32F035

Cmsemicon
  • Core

    Cortex-M0, 64 MHz

  • Family

    M0 Series

  • Sub-Family

    CMS32 Series

  • CMSIS Pack

    CMS32-Series

Core
- ARM Cortex-M0 core runs up to 64 MHz
- One 24-bit system timer
- Supports low power Sleep/Deep sleep/Stop Mode
- A single-cycle 32-bit hardware multiplier
Memory
- 64KB Flash memory for program memory and boot
- Independent 1KB Flash memory for data memory
- 8KB SRAM for internal scratch-pad RAM (SRAM)
In-System Programming (ISP) & In-Application Programming (IAP) & In-Circuit Programming (ICP)
Clock Control
- 64 MHz internal oscillator (HIRC)
- 40 KHz internal low-power oscillator (LIRC)
Timer
- Four Timers
Watchdog Timer & Window Watchdog Timer
- Programmable clock source and timeout period
EPWM
- Built-in enhanced PWM up to four channels
UART
- Two UART devices
SPI
- One SPI device
I2C
- One I2C device
ADC0
- 12-bit SAR ADC with 100K SPS
ADC1
- 12-bit SAR ADC with 1M SPS
Analog Comparator
- Two analog comparators
Operation Amplifier
- Two operation amplifiers
Programmable Gain Amplifier
- Two programmable gain amplifiers
LVR
- Programmable 3 threshold levels: 1.9V/2.1V/2.6V/3.5V
LVD
- Programmable 8 threshold levels
96-bit unique ID
128-bit user ID

  • Features

    Device

    CMS32F035

  • Memory

    IRAM1 8 KiB
    IROM1 64 KiB